The present invention relates to converting a digital input into an analog output, and more particularly, to a high linearity digital-to-analog converter with an ISI-suppressing method.
A digital-to-analog converter (DAC) is used to convert a digital input into an analog output. In thermometer coding multi-bit DAC designs, the digital input is mapped to multiple 1-bit values each driving a 1-bit DAC, and DAC outputs of the 1-bit DACs are combined to form the analog output. Ideally, each 1-bit DAC generates a two-level analog output waveform that instantaneously switches between its two levels when its input bit value changes from 0 to 1 (or from 1 to 0). In practice, non-ideal circuit behavior causes multi-bit DACs to deviate from the ideal DAC behavior. Particularly significant types of non-ideal circuit behavior are element mismatches and nonlinear inter-symbol interference (ISI). Mismatches among elements that make up these 1-bit DACs inevitably occur during fabrication and cause error in the multi-bit DAC output. Additionally, practical 1-bit DACs do not transit instantaneously between their two levels, thus introducing signal-dependent transient errors at rising edges and falling edges. In many cases, a 1-bit DAC's transient error depends on one or more of its prior input bit values as well as its current input bit value. Such rising and falling transient errors are said to contain ISI.
Thus, there is a need for an innovative DAC design that is capable of reducing distortion caused by DAC nonlinearity.